Kirchhoff’s Current Law (KCL)
- If conductors connect to a node, then at this particular node, the sum of input and output currents is zero
- Convention:
- Current flowing into node is positive
- Current flowing out of node is negative
Kirchhoff’s Voltage Law (KVL)
- The sum of voltages around a closed loop is zero
- Convention:
- Voltage rises ( -> ) have positive sign
- Voltage drops ( -> ) have negative sign
Systematic Approaches
- Two approaches covered:
- Node-to-datum analysis
- Mesh analysis
Node-To-Datum (NTD) Analysis
- We describe a voltage at each node using a reference voltage
- This reference is known as a node-to-datum voltage
- Each node is described having a difference in potential compared to the node-to-datum voltage
Steps for NTD:
- Identify all nodes in a circuit and select node as reference node, voltage at reference node is assumed to be ->
- If a voltage source is connected between reference node and non-reference node -> nodal voltage = voltage from voltage source
- Apply KCL to remaining non-reference nodes + use Ohm’s Law to express unknown branch currents in terms of node voltages
- Solve resulting simultaneous equations to obtain unknown node voltages
Resistors are passive elements, that means if a current moves across a resistor with resistance of Ohms and moves from node A to node B, node A is considered the () end and node B is the () end:
If a voltage source is connected between two non-reference nodes, you cannot use NTD to solve circuit -> you must use supernode analysis (covered next lecture)